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8
82C54
Since the Control Word Register and the three Counters have
separate addresses (selected by the A1, A0 inputs), and each
Control Word specifies the Counter it applies to (SC0, SC1
bits), no special instruction sequence is required. Any
programming sequence that follows the conventions above is
acceptable.
CONTROL WORD FORMAT
A1, A0 = 11; CS = 0; RD = 1; WR = 0
D7
D6
D5
D4
D3
D2
D1
D0
SC1
SC0
RW1
RW0
M2
M1
M0
BCD
SC - SELECT COUNTER
SC1
SC0
0
Select Counter 0
0
1
Select Counter 1
1
0
Select Counter 2
1
Read-Back Command (See Read Operations)
RW - READ/WRITE
RW1 RW0
0
Counter Latch Command (See Read Operations)
0
1
Read/Write least significant byte only.
1
0
Read/Write most significant byte only.
1
Read/Write least significant byte first, then most
significant byte.
M - MODE
M2
M1
M0
0
Mode 0
0
1
Mode 1
X
1
0
Mode 2
X
1
Mode 3
1
0
Mode 4
1
0
1
Mode 5
BCD - BINARY CODED DECIMAL
0
Binary Counter 16-bit
1
Binary Coded Decimal (BCD) Counter (4 Decades)
NOTE: Don’t Care bits (X) should be 0 to insure compatibility with
future products.
POSSIBLE PROGRAMMING SEQUENCE
A1
A0
Control Word - Counter 0
1
LSB of Count - Counter 0
0
MSB of Count - Counter 0
0
Control Word - Counter 1
1
LSB of Count - Counter 1
0
1
MSB of Count - Counter 1
0
1
Control Word - Counter 2
1
LSB of Count - Counter 2
1
0
MSB of Count - Counter 2
1
0
POSSIBLE PROGRAMMING SEQUENCE
A1
A0
Control Word - Counter 0
1
Control Word - Counter 1
1
Control Word - Counter 2
1
LSB of Count - Counter 2
1
0
LSB of Count - Counter 1
0
1
LSB of Count - Counter 0
0
MSB of Count - Counter 0
0
MSB of Count - Counter 1
0
1
MSB of Count - Counter 2
1
0
POSSIBLE PROGRAMMING SEQUENCE
A1
A0
Control Word - Counter 2
1
Control Word - Counter 1
1
Control Word - Counter 0
1
LSB of Count - Counter 2
1
0
MSB of Count - Counter 2
1
0
LSB of Count - Counter 1
0
1
MSB of Count - Counter 1
0
1
LSB of Count - Counter 0
0
MSB of Count - Counter 0
0
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